Computer Architecture Lab/WS2008
Gruppe 0
[edit | edit source]IS1
[edit | edit source]Vergleich der Instruktionssets von:
- Z80
- Atmel AVR
- ARM7TDMI
Vergleich:
Gruppe 1
[edit | edit source]Vergleich der Instruktionssets von:
AVR 8-Bit
http://www.atmel.com/dyn/resources/prod_documents/doc0856.pdf
68000
http://www.freescale.com/files/archives/doc/ref_manual/M68000PRM.pdf
http://www.freescale.com/files/32bit/doc/ref_manual/MC68000UM.pdf
8080
Zu finden: Hier
Sweet 16 (Gruppe 2)
[edit | edit source]Franz-Josef Katzdobler, Daniel Reichhard, Stefan Resch, Matthias Wenzl
Instruction Set I
[edit | edit source]The discussion and the comparison of the instruction sets from
can be found here.
Gruppe 3
[edit | edit source]Christian Pfeifhofer, Michael Wessner, Michael Zoech
Instruction Set 1
[edit | edit source]Comparison of the instruction sets of:
- PICMicro PIC16Cxxx
- DEC Alpha
- Intel 4004
Instruction Set 2
[edit | edit source]The instruction set of our processor:
Processor Documentation
[edit | edit source]The documentation of our processor is available in pdf format:
AUA (Another Useless Architecture)
[edit | edit source]- Rottensteiner Stefan
- Tauner Stefan
- Wilhelm Jakob
Instruction Set Comparison
[edit | edit source]- AVR32
- Intel i960
- SuperH
Our own CPU
[edit | edit source]A quite standard 16bit RISC implementation with 32 registers and probably a 4 stage pipeline (ex and mem combined).
Gruppe 5 (Project: MaQuelle)
[edit | edit source]Instruction Set I
[edit | edit source]- Infineon TriCore
- Freescale MPC7448 (PowerPC)
- Motorola 68000
Comparison: