Computer Architecture Lab/SS2014/group 4/BeMicro/notes

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Pin out[edit | edit source]

Clocks[edit | edit source]

Clock Pin
50MHz E1

User LEDs[edit | edit source]

0 N15
1 K5
2 P9
3 P15
4 R10
5 L13
6 D1
7 B1

Other LEDs[edit | edit source]

Two LEDs are connected to the Ethernet, these are not directly available on the FPGA. Three LEDs for power and showing correct/incorrect configuration/programming - not user programmable.

Switches[edit | edit source]