Jump to content

Computer Architecture Lab/Winter2006/HoeftPirkWeirHuang/InstructionSetII/More

Add links
From Wikiversity

VHDL-Source for NORISK-Chip (hardware-programmer, CPU)

Features

[edit | edit source]
  • 32-bit Harvard processor architecture
  • Dual-ported Instruction Memory
  • Word addresses
  • Memory Mapped IO
  • On Chip-Memory programmer
  • 16 general purpose registers
  • 16-bit instructions
  • Instruction preprocessing
  • 3-stage piplining
  • 1 cycle relative conditional branches
  • 1 cycle absolute jumps
The Block Diagram of our NORISK Processor
Block Diagram of the NORISK Processor

Instruction Set

[edit | edit source]

Three Operands

[edit | edit source]

The 8-bit immediate values are unsigned, 11-bit branch values are signed.

3 Operands
Name OpCode Operands Note Decoding
ADD 0000 ddddrrrraaaa D = R + A; 00000
ADC 0001 ddddrrrraaaa D = R + A + C 00001
SUB 0010 ddddrrrraaaa D = R - A 00010
SBC 0011 ddddrrrraaaa D = R - A - c 00011
AND 0100 ddddrrrraaaa D = R and A 00100
OR 0101 ddddrrrraaaa D = R or A 00101
CMPI 0110 rrrriiiiiiii R - I => flags 10000
XOR 0111 ddddrrrraaaa D = R xor A 00110
LDB0 1000 rrrriiiiiiii R(31~8) = 0, R(7~0) = I 01000
LDB1 1001 rrrriiiiiiii R(31~16) = 0, R(15~8) = I 01001
LDB2 1010 rrrriiiiiiii R(31~24) = 0, R(23~16) = I 01010
LDB3 1011 rrrriiiiiiii R(31~24) = I 01011
RJMP 11000 iiiiiiiiiii PC = PC + I 100xx (not 10000)
RCALL 11001 iiiiiiiiiii R15 = PC; PC = PC + I 100xx (not 10000)
BRNE 11010 iiiiiiiiiii if(!zero) PC = PC + I 100xx (not 10000)
BREQ 11011 iiiiiiiiiii if(zero) PC = PC + I 100xx (not 10000)
BRCC 11100 iiiiiiiiiii if(!carry) PC = PC + I 100xx (not 10000)
BRCS 11011 iiiiiiiiiii if(carry) PC = PC + I 100xx (not 10000)

Two Operands

[edit | edit source]

All 4-bit immediate values are unsigned.

2 Operands (2 instructions available)
Name OpCode Operands Note Decoding
ADDI 11110000 rrrriiii R = R + I 00000
ADCI 11110001 rrrriiii R = R + I + C 00001
SUBI 11110010 rrrriiii R = R - I 00010
SBCI 11110011 rrrriiii R = R - I - C 00011
LSL 11110100 rrrrssss R <<= S 01110
ASL 11110101 rrrrssss R >>>= S 01111
CMP 11110110 rrrraaaa R = A => zero flag 10000
11110111
ROL 11111000 rrrrssss 01100
ROR 11111001 rrrrssss 01101
ST 11111010 ddddaaaa [A] = D 100xx (not 10000)
LD 11111011 ddddaaaa D = [A] 11xxx
LSLI 11111100 rrrriiii R <<= I 01110
ASRI 11111101 rrrriiii R >>>= I 01111
MOV 11111110 ddddssss D = S 10101
11111111

One Operand

[edit | edit source]
1 Operand (9 instructions available)
Name OpCode Operand Note Decoding
JMP 111111110000 rrrr PC = R
CALL 111111110001 rrrr PC => [SP], SP--, PC = R
PUSH 111111110010 rrrr R => [SP], SP--
POP 111111110011 rrrr SP++, [SP] => R
NEG 111111110100 rrrr R = -R 10101
COM 111111110101 rrrr R = not R 00111
PAR 111111110110 rrrr 1s in R
111111110111

Non Operand

[edit | edit source]
0 Operand (3 instructions available)
Name OpCode Note Decoding
RET 1111111111110000 SP++, [SP] => PC
RETI 1111111111110001
CLI 1111111111110010 Interrupt flag = 0
SEI 1111111111110011 Interrupt flag = 1
SKIPCC 1111111111110100
SKIPCS 1111111111110101
SKIPNE 1111111111110110
SKIPEQ 1111111111110111
SKIPNO 1111111111111000
SKIPOV 1111111111111001
SKIPNOTNEG 1111111111111010
SKIPNEG 1111111111111011
1111111111111100
1111111111111101
1111111111111110
NOP 1111111111111111 100xx (not 10000)

Pipelining

[edit | edit source]

The NORISK Processor implements three-stage pipelining:

  • Instruction fetching and simple branch logic
  • Decoding
  • Execution and Memory Access

Macro Assembler

[edit | edit source]

The macro assembler was written using flex and yacc. The goal was to produce an intuitive assembler. It allows C-style usage of assembly operations.

C/C++, Flex, Yacc-Sources for assembler and instruction set simulator. Assembler-Sources for example assembly programs.

Data memory initialization

[edit | edit source]
  • Zero initialized 32bit words:

word identifier[size]

  • User initialized 32bit words: (size determined by assembler)

word identifier[]=word1,word2,word3,...

  • User initialized 32bit words: (size determined by programmer)

word identifier[size]=word1,word2,word3,...

  • String:

word identifier[]="string"

  • String: (size determined by programmer)

word identifier[size]="string"

Data transfer

[edit | edit source]
  • Register-Register:

rXX = rYY

  • Register-Memory and Memory-Register

rXX = rYY[disp]
rXX[disp] = rYY
Displacement values above zero are not possible with the current NORISK instruction-set.

  • Register-Immediate

rXX = immediate
Immediate values can be numeric (0x for hexadecimal), labels or storage variables.

Arithmetic Operations

[edit | edit source]
  • Possible operations are &,|,^,<<,>>, <R< (rotate left), >R> (rotate right), >A> (arithmetic shift right)
  • Syntax 1: rXX = rYY op rZZ
  • Syntax 2: rXX op=rZZ

rXX is source and destination

  • For some operations (depending on the instruction set) immediate values instead of rZZ are possible.

Control flow

[edit | edit source]
  • Labels: identifier followed by :
  • Branch: goto label
  • Conditional branch: goto label if condition
  • Flag conditions: carry, !carry, zero, !zero
  • Compare conditions: rXX {< or <= or > or >= or == or !=} {rYY or immediate}

This type of conditions produce a CMP operation before the branch.

  • Relative call: rcall label. Saves next PC in register 15 and performs a relative jump.
  • Return: return

Example program: bubble-sort

[edit | edit source]
word test[]={20,20,21,19,15,1,10,12,6,7,3,100, 99,98,97}

r5 = sizeof(test)
r5 = r5+r0  ; calculate end

outer_loop:
r1 = test ; memory address of 1st operand
r2 = test ; memory address of 2nd operand
r2 += 1
r6 = 0  ; flag if sort is completed

inner_loop:
r3 = r1[0] ; load operands
r4 = r2[0]

goto next if r3 <= r4 ; decide whether it is necessary to swap them
r2[0] = r3 ; swap elements
r1[0] = r4
r6 += 1    ; set not-done flag

next:
r1 += 1
r2 += 1 ; next index
goto inner_loop if r2 < r5 ; repeat if end not reached
goto outer_loop if r6 != 0 ; repeat if sort not finished

r0 = 0x80000000 ; IO-address for leds
r1 = 0xF
r0[0] = r1 ; illuminate four leds

infinite:
goto infinite ; loop forever

Call Parameters

[edit | edit source]

ass prgm_file bin_out [bin_data_out]

  • prgm_file is the source code file
  • bin_out is the binary code output
  • bin_data_out is the binary data output. If this parameter is omitted, a default value (based on the bin_out parameter) is used.

Instruction Set Simulator

[edit | edit source]

Call Parameters

[edit | edit source]

iss prgmmem datamem [datamem_out]

  • prgmmem is the filename of assembly program code output
  • datamem is the filename of assembly data output
  • datamem_out is optional. If specified the contents of the data memory after quit are written to that file.

During Operation

[edit | edit source]
  • Enter executes next instruction
  • Sometimes IO input is requested (prompt: [IO@ address]:) the value specified is returned for this load operation. 0x for hexadecimal is allowed.
  • q stops execution and writes data file

On chip-memory programmer

[edit | edit source]

Visual C++ Source for Programmer using a serial com port.

Console operation

[edit | edit source]
  • programmer com_port_number con

Sends input from keys to the serial interface and displays received data.

Read memory

[edit | edit source]
  • programmer com_port_number read {prgm|data} file number_of_words

Reads first number_of_words words of program or data memory and writes file.

Write specific memory

[edit | edit source]
  • programmer com_port_number write {prgm|data} file [max_number_of_words]

Writes a maximum of max_number_of_words words of program or data memory from file. If max_number_of_words is omitted it writes the whole file.

Write whole program

[edit | edit source]
  • programmer com_port_number writeall basename

Writes basename.mif to program memory and basename_data.mif to data memory.

Retrieved from "https://en.wikiversity.org/w/index.php?title=Computer_Architecture_Lab/Winter2006/HoeftPirkWeirHuang/InstructionSetII/More&oldid=2316391"