Jump to content

Understanding FPGA Design

From Wikiversity

Programmable Logic Devices

[edit | edit source]
  • PLA
  • PAL
  • GAL
  • CPLD
  • FPGA

FPGA Architectures

[edit | edit source]
  • Basic structure of FPGAs (pdf)
  • FPGA based on SRAMs (pdf)
  • FPGA based on ROMs with anti-fuses (pdf)
  • FPGA based on Non-volatile Memories (pdf)
  • Features of FPGAs

Circuit Level Characteristics

[edit | edit source]
  • Logic Cell Circuit
  • IO Cell Circuit
  • Interconnect Circuit

FPGA Development Phases

[edit | edit source]
  • Design
  • Simulation
  • Synthesis
  • Implementation (pdf)
  • Programming

Clocking Scheme

[edit | edit source]
  • Clock Control
  • Clock Domain
  • Reset Signals
  • Xilinx DCM & 2-phase clock, Contraining technique
  • Xilinx XPower, Power and Energy Aware Design?

Using ROM

[edit | edit source]
  • VHDL Example Code ( pdf )

Latch based design

[edit | edit source]
  • Latch in FGPA ( pdf )

Dual Edge Triggered Flip Flop based design

[edit | edit source]

See Electrical & Computer Engineering Studies