Logic gates/NAND

From Wikiversity
Jump to navigation Jump to search
An IC chip containing NAND gates.

NAND Gate = "NOT"-"AND" ~ Therefore this indicates that the result of the inputs placed through the gate will go through the AND operation and the NOT operation. The correct order of processing is:
Step 1. Put the inputs through the AND operation.
Step 2. From the results of the first step - invert (using the NOT operation).
Step 3. Take the result from Step 2 as the output.

The NAND gate and the NOR gate can be said to be universal gates since combinations of them can be used to accomplish any of the basic operations and can thus produce an inverter, an OR gate or an AND gate. The non-inverting gates do not have this versatility since they can't produce an invert.

Rules of a NAND gate[edit | edit source]

The output is high when either of inputs A or B is high, or if neither is high. In other words, it is normally high, going low only if both A and B are high. The rules of the gate are represented in the truth table below:

A NAND gate with 2 inputs
Input A Input B Output X
0 0 1
0 1 1
1 0 1
1 1 0

Circuit Symbol[edit | edit source]

The NAND gate is represented within a circuit diagram using the following circuit symbol:

The NAND gate circuit symbol

In the example to the left we can see that A & B are the inputs and the output is the result of A & B processed through the "AND" operation and then the value is inverted. This is represented using a method of notation called "DeMorgans Logic Notation".

Physical Representation[edit | edit source]

NAND Gates are mass produced in the form of an IC Chip. A fourteen pin IC chip for the NAND operation normally contains four individual NAND gates.

General layout of NAND gates on within an IC chip

External References[edit | edit source]

This online text [1] has a great deal of further information about circuit analysis, design and Boolean Algebra.