VHDL for FPGA design

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It is a course of Electronic engineering

Level 1

Term 1

Contents 1 Syllabus 2 Lecture plan 3 Lab Materials 4 Reference books 5 Online resources 6 Learning projects 7 Research projects 8 News 9 Wikiversity activities 9.1 Active participants 9.2 To do 10 See also

[edit] Syllabus

Unless otherwise noted, all courses in this curriculum are Wikibooks modules, not wikiversity course modules.

EE 215

[edit] Lecture plan

• Digital Circuits
• Programmable Logic

[edit] Lab Materials

• VHDL for FPGA Design - Principles and Practices

[edit] Reference books

[edit] Online resources

[edit] Learning projects

[edit] Research projects

[edit] News

[edit] Wikiversity activities

[edit] Active participants

[edit] To do

[edit] See also